Addressing modes are the ways how architectures specify
the address of an object they want to access. In GPR machines, an addressing
mode can specify a constant, a register or a location in memory.
|Addressing modes||Example Instruction||Meaning||When used|
|Register||Add R4,R3||R4 <- R4 + R3||When a value is in a register|
|Immediate||Add R4, #3||R4 <- R4 + 3||For constants|
|Displacement||Add R4, 100(R1)||R4 <- R4 + M[100+R1]||Accessing local variables|
|Register deffered||Add R4,(R1)||R4 <- R4 + M[R1]||Accessing using a pointer or a computed address|
|Indexed||Add R3, (R1 + R2)||R3 <- R3 + M[R1+R2]||Useful in array addressing:
R1 - base of array
R2 - index amount
|Direct||Add R1, (1001)||R1 <- R1 + M||Useful in accessing static data|
|Memory deferred||Add R1, @(R3)||R1 <- R1 + M[M[R3]]||If R3 is the address of a pointer p, then mode yields *p|
|Add R1, (R2)+||R1 <- R1 +M[R2]
R2 <- R2 + d
|Useful for stepping through arrays in a loop.
R2 - start of array
d - size of an element
|Add R1,-(R2)||R2 <-R2-d
R1 <- R1 + M[R2]
|Same as autoincrement.
Both can also be used to implement a stack as push and pop
|Scaled||Add R1, 100(R2)[R3]||R1<-R1+M[100+R2+R3*d]||Used to index arrays. May be applied to any base addressing mode in some machines.|
Immediate and displacement addressing modes dominate addressing mode usage. The major question for displacement-style addressing mode is that of the range of displacement used. Choosing the displacement field size is important because it directly affects instruction length. According to measurements taken on the data access on a GPR architecture using SPEC benchmarks displacement values are widely distributed.
Another important instruction set measurement is the
range of values for immediates
. Small immediate values are used
most heavily. However, large immediates are sometimes used, most likely
in address calculations.
the range of addressing modesFor small number of addressing modes or opcode/addressing mode combinations, the addressing mode can be encoded in opcode.
the degree of independence between opcodes and modes
The desire to have as many registers and addressing modes as possible.
The impact of the size of the register and addressing mode fields on the average instruction size and hence on the average program size.
A desire to have instructions encode into lengths that are easy to handle in the implementation (multiples of bytes, fixed-length) with possible sacrificing in average code size.