Papers and Reports on the Panini Programming Language
To refer to Capsule-oriented Programming and Capsules, we request that you cite the following paper. For other papers, please see below.
Yuheng Long, Mehdi Bagherzadeh, Eric Lin, Ganesha Upadhyaya and Hridesh Rajan, On Ordering Problems in Message Passing Software, MODULARITY'16: 15th International Conference on Modularity, Malaga, Spain, March 2016.
This MODULARITY paper quantifies the relation with the causes of the ordering problems in in over 30 message passing applications.
Yuheng Long and Hridesh Rajan, A Type-and-Effect System for Asynchronous, Typed Events, MODULARITY'16: 15th International Conference on Modularity, Malaga, Spain, March 2016.
This MODULARITY paper introduces a novel hybrid (static and dynamic) type-and-effect system to improve concurrency in event-driven system.
Ganesha Upadhyaya and Hridesh Rajan, Effectively Mapping Linguistic Abstractions for Message-passing Concurrency to Threads on the Java Virtual Machine, OOPSLA'15: The ACM SIGPLAN conference on Systems, Programming, Languages and Applications: Software for Humanity (SPLASH), Pittsburgh, PA, USA, October 2015.
This OOPSLA paper introduces a modular and automated technique that maps message-passing concurrency (MPC) abstractions such as capsules to threads based on the source-level properties of these abstractions.
This NIER paper introduces capsule-oriented programming to the software engineering community and reports on the current state of the NSF-funded Panini project.
Mehdi Bagherzadeh and Hridesh Rajan, Panini: A Concurrent Programming Model for Solving Pervasive and Oblivious Interference, Modularity'15: 14th International Conference on Modularity, Fort Collins, Colarado, USA, March 2015.
This is our first paper on formal semantics of capsules. This paper proposes pervasive and oblivious interference, two fundamental problems with concurrent programming. It formalizes capsules and proves that the capsule-oriented programming model provides two properties sparse and cognizant interference.
This paper proposes a new type-and-effect system that improves precision of effect reasoning by utilizing dynamic type information.
Ganesha Upadhyaya and Hridesh Rajan. An Automatic Actors to Threads Mapping Technique for JVM-based Actor Frameworks, ACM SIGPLAN AGERE'2014, October 20, 2014.
This paper presents our preliminary work on compilation strategies for capsules (and actors). Our goal is to improve CPU utilization and decrease program runtime.
Hridesh Rajan, Steven M. Kautz, Eric Lin, Sean L. Mooney, Yuheng Long, and Ganesha Upadhyaya. Capsule-oriented Programming in the Panini Language, Tech. Report 14-08, Computer Science, Iowa State University, August 5, 2014.
This document is the programming language manual for the Panini language that provides capsules, an abstraction for concurrent programming.
Hridesh Rajan, Eric Lin, Sean L. Mooney, Yuheng Long, Ganesha Upadhyaya, Steven M. Kautz, Sarah Kabala, Bryan Shrader, Lorand Szakacs, and Rex Fernando. Capsule-oriented Programming, Tech. Report 13-01, Computer Science, Iowa State University, July 25, 2013.
This paper introduces initial version of capsules, an abstraction for concurrent programming.
Yuheng Long, and Hridesh Rajan. Trust, but verify: Optimistic Effect Analysis for Reusable Code, Technical Report 12-02, Computer Science, Iowa State University, April 2012.
This paper introduces open effects, an optimistic notion of effects for reusable object-oriented code.
Tyler Sondag, and Hridesh Rajan. Phase-based Tuning for Better Utilization of Performance-Asymmetric Multicore Processors, in the proceedings of the International Symposium on Code Generation and Optimization (CGO), April 2011, Chamonix, France.
This paper introduces phase-based tuning, a technique for improving the utilization of performance-asymmetric multicore processors.
Hridesh Rajan. Building Scalable Software Systems in the Multicore Era, in the proceedings of the 2010 FSE/SDP Workshop on the Future of Software Engineering, Santa Fe, NM, November 2010.
This paper describes the overall hypothesis of the Panini project and discusses open issues and directions.
Hridesh Rajan, Steven M. Kautz, and Wayne Rowcliffe. Concurrency by Modularity: Design Patterns, a Case in Point, in the proceedings of the Onward! Conference, October 17-21, 2010, Reno-Tahoe, USA.
This paper introduces implicitly-concurrent Gang-of-Four design patterns. It describes the initial design and preliminary evaluation of their software engineering and performance advantages.
Yuheng Long, Sean Mooney, Tyler Sondag, and Hridesh Rajan. Implicit Invocation Meets Safe, Implicit Concurrency, in the proceedings of the Ninth International Conference on Generative Programming and Component Engineering. (GPCE'10), October 10-13, 2010, Eindhoven, The Netherlands.
This paper introduces asynchronous, typed events in Panini. It describes the initial design and preliminary evaluation of their software engineering and performance benefits.
Yuheng Long, Sean Mooney, Tyler Sondag, and Hridesh Rajan. Panini: Reconciling Concurrency and Modularity in Design. Technical Report 09-28b, Computer Science, Iowa State University, March 25, 2010.
This technical report introduces asynchronous, typed events in Panini, formally defines its semantics via a core calculus, and gives a preliminary evaluation of its design and performance benefits.
Tyler Sondag and Hridesh Rajan. Phase-guided Thread-to-core Assignment for Improved Utilization of Performance-Asymmetric Multi-Core Processors. 2nd International Workshop on Multicore Software Engineering (IWMSE '09), May 2009, Vancouver, Canada.
A preliminary paper on phase-based tuning, an automatic technique for improving utilization of performance-asymmetric multicore processors.
Tyler Sondag, Viswanath Krishnamurthy, and Hridesh Rajan. Predictive Thread-to-Core Assignment on a Heterogeneous Multi-core Processor. PLOS '07: ACM SIGOPS 4th Workshop on Programming Languages and Operating Systems, Skamania Lodge, Stevenson, Washington, USA, Oct 2007.
This position paper described the need for improving utilization of performance-asymmetric multicore processors.
Page last modified on $Date: 2013/08/15 06:24:34 $